Note

Due to the coronavirus pandemic, the laboratory practical course "Circuit Design with FPGA" will be offered exclusively online in the winter semester 2020/2021.

Please check the ILIAS page of the course for news and the exact schedule.

The number of participants is limited.
Registration does not guarantee a place in the lab.

Students of the study models of the IMS (Master) have priority in the allocation of places.

Registration / preliminary meeting
Registration is online via ILIAS. A password is not required.
Registration deadline:

The preliminary meeting takes place in the seminar room of the IMS (building 06.41, room 108).

The practical course will take place on 10 dates. In order to make this possible, participants are expected to prepare and follow up accordingly. After completion of all projects an internship report has to be written. The internship report must be submitted by 06/03/2019.

Objectives:
In the practical course "Systems with Programmable Logic" the practical handling of ASICs, their programming and the final functional test of the designed logic functions on hardware level shall be taught.

Content:

• Introduction to the integrated development environment Quartus II based on the creation of convolutional encoders.
• Creation of simulation stimuli and comparison of the simulation results of the created coders.
• Programming of the logic device considering the special hardware
• Creation of digital filters by means of advanced graphical design (using the integrated tools of the development environment).
• Programming and measurement of the created filters.
• Creation of parameterized digital filters in VHDL considering different variants of implementation.
• Comparison and discussion of the need for logic cells and the performance of the filters.